During production of devices with embedded memories, such as programmable logic devices (PLDs), various types of manufacturing steps may be used such as plasma-based manufacturing steps. However, such plasma-based steps (e.g., plasma etching steps), can inadvertently cause damage to embedded memories, especially those implemented with non-volatile memory cells. In particular, the floating gates of flash memory cells can become overcharged and possibly damaged during such processes.
As a result, various techniques have been developed to monitor the charging of nonvolatile memory cells during manufacture. For example, in one approach, a process charging test wafer may be used. In this regard, a test wafer may be subjected to a semiconductor manufacturing process and subsequently evaluated for damage.
Unfortunately, because an entire wafer is expended using this approach, it can become prohibitively expensive if used frequently during production. In addition, this approach cannot be used to monitor potential damage suffered by individual wafers delivered from a manufacturing process line. Moreover, this approach is generally not suitable for vendors that lack extensive fabrication facilities. Accordingly, there is a need for an improved approach to the monitoring of manufacturing-induced charging of embedded memories.